Technical Field
The present disclosure relates to the technical field of semiconductors, and in particular, to a semiconductor device and a manufacturing method therefor.
Related Art
A Fin Field Effect Transistor (FinFET) device is capable of improving performance of a device, reducing a supply voltage, and significantly reducing short-channel effects. However, some problems may occur during an existing method for manufacturing a FinFET device. For example, a source and a drain are needed in an N metal oxide semiconductor (NMOS) transistor and a P metal oxide semiconductor (PMOS) transistor. However, a source and a drain formed on a fin through an epitaxial process may be irregular, which influences performance and uniformity of a device.
There are two designs in the prior art, respectively referred to in FIG. 1A and FIG. 1B. However, there may be some problems for the two designs, separately.
For the design shown in FIG. 1A, three pseudo gates are formed on each of two fins that are isolated by a trench. For example, three pseudo gates 11, 12, and 13 are formed on the left fin. If drifting of a pseudo gate relative to an active region occurs in a manufacturing process of a device (for example, in FIG. 1A, the three pseudo gates on the left fin drift leftwards relative to the active region below and the three pseudo gate on the right fin drift rightwards relative to the active region below, or a key dimension of a pseudo gate may also change), a result of an undesired source or drain formed at peripheries of the fins may be probably caused. For example, a source (or drain) 14 on the left fin and a drain (or source) 15 on the right fin, as shown in FIG. 1A, may be caused In an epitaxial process, the source (or drain) 14 may be connected to the drain (or source) 15, thereby reducing performance of the device.
For the design shown in FIG. 1B, pseudo gates 22 and 23 are formed on a left fin and a right fin, respectively, and a pseudo gate 21 is formed on an insulator 26 for filling a trench between the two fins. During epitaxial growth of a source or a drain, the epitaxial growth of a source and a drain at peripheries of the fins in contact with the insulator 26 may be constrained, so as to cause an irregular appearance of source (or drain) 24 on the left fin or a drain (or source) 25 on the right fin, as shown in FIG. 1B, thereby influencing performance of the device.